IMEC and Nanda Technologies to collaborate on wafer inspection for 3D integration
Nanda Technologies and IMEC have entered into a joint development program in the field of 3D integration. Together, they will develop methods to qualify and monitor wafer defectivity at critical steps of the 3D integration process flow.

BAVARIA, GERMANY, July 09, 2010 /24-7PressRelease/ -- Nanda Technologies, and the Belgian nanoelectronics research center IMEC have entered into a joint development program in the field of 3D integration. Together, they will develop methods to qualify and monitor wafer defectivity at critical steps of the 3D integration process flow.

IMEC will use NANDA Technologies' SPARK wafer inspection platform to qualify 200 and 300mm wafers produced using its 3D-Stacked IC (3D-SIC) technology platform. The Spark platform supports a wide range of surface materials and topographies and therefore can be used for inspection at various stages of the integration flow such as after TSV etch, after wafer bonding and thinning.

3D-SIC technology has the potential to move the semiconductor industry beyond planar scaling. It enables direct stacking of thinned ICs while realizing through-die area array interconnects between them with an extremely high density (up to 10000 interconnects/mm²). Applications include the integration of image sensors, Flash, DRAM, processors, FPGAs and power amplifiers. Active CMOS 3D-SIC stacks have already been demonstrated. Adequate wafer inspection and metrology are considered prerequisites for bringing 3D-SIC technology into the commercialization phase since they will enable to proactively manage 3D-system yield.

For its 3D-SIC technology, IMEC uses a process flow where TSVs are realized in a single-damascene process that is performed immediately after front-end and contact processing but prior to processing of the back-end metallization layers. This process enables small via diameters (1-5µm). After completion of the back-end wiring, Si is removed from the bottom of the substrate to open the buried through-silicon vias. Dies (or wafers) subsequently are stacked and interconnected in a bonding step.

"We are happy to have a Nanda inspection system installed at our facility. Nanda's technology offers improved inspection capabilities and detection of a wide range of different defects within a single inspection system. The tool will help us to optimize our 3D-integration process and enable us to build more complex 3D-system demonstrators", said Eric Beyne, Program Director of IMEC's Afiliation Program on 3D integration.

"The advantages of our innovative technology perfectly fit the needs of inspection within the 3D-integration process. We can detect large area defects and changes in topography as well as small particles with our one shot technology. By using light of different wavelengths we are able to inspect the glue layer between two bonded wafers. Combined with high throughput our solution not only catches a broad range of defects, but also offers a low cost of ownership," comments Dr. Lars Markwort, CEO of Nanda Technologies.

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Johannes von Borries
Nanda Technologies
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